SPI_RXFTLR

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Interpret as SPI_RXFTLR

Description

Receive FIFO Threshold Level Register

Fields

RFT

Receive FIFO Threshold. Controls the level of entries (or above) at which the receive FIFO controller triggers an interrupt. The FIFO depth is 16. If the value in this bit field is set greater than the depth of the FIFO, this bit field is not written and retains its current value. When the number of receive FIFO entries is greater than or equal to this value + 1, the receive FIFO full interrupt is triggered.

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